1. Field
This disclosure relates to semiconductor fabrication, such as, fabrication of solar cells, and, more specifically, to masking and unmasking of substrates during deposition process.
2. Related Art
During a deposition process, e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), etc., different materials, such as metals, dielectrics, etc., are deposited on the substrate surface. Often, some areas on the substrate need to remain free of deposition. These areas may include, but not limited to, substrate edges, lines, or various size zones within the substrate.
The standard way to create those open areas is by either removing deposited material from those areas after deposition is done, or masking the areas during deposition. Masking is usually done by either a removable hard mask placed on the top of the substrate, or patterning photoresist using photolithography process. In the first case, the openings in the mask are the areas where deposition will occur. In the latter case, the photoresist will be removed in a downstream process by a lift-off process along with the material deposited on top of it.
The standard procedure and materials for the lift-off process are positive and negative photoresists, photoimagable polyimide and silicone. None of these materials can withstand elevated PVD or CVD process temperatures, and each requires post-process removal by wet chemicals that may be incompatible with the deposited material. Besides, these materials require a relatively long curing cycle that limits the tool throughput.
In the fabrication of solar cells, various layers are deposited on both sides of the substrate. Consequently, materials from the layers of the front surface may make conductive contact with materials from the back surface, leading to a short—referred to in the solar industry as edge shunt. Various methods have been used in the art to avoid the edge shunt, including using physical mask during deposition, using laser ablation, chemical etching of the edges, etc. Laser is sometimes used for edge shunt isolation by burning a thin line on the front of the cell along the edge through the transparent conductive and passivation layers. The area between this line and the edge is lost to electricity generation, which reduces the cell efficiency. Using laser on the back side of the cell, where the metal is, has other problems. To evaporate the metal the laser beam should be so strong that it damages the underlying silicon. Besides, melted metal gets deeply into silicon and reduces isolation resistance. Moreover, the evaporated metal gets re-deposited, contaminating the wafer.